2006-02-24
大家好！
我公司目前急需ASIC方面的高级经理，如果有意向或是有相关经历的人，望能推荐！联系资料请发至：ulanyu2004@hotmail.com
Project Description
l ³Enablement of new technologies
l ³IP development
l ³ASIC and SoC development - from requirements to product
l ³Software and Hardware Co-development
Job Title Qualifications
1. Verification Engineer
Software
l Introduction to programming (C, C++)
l System Programming
l Software Engineering (MATAM)
Hardware
l Digital Systems
l Logic Design
l Computer Networks
l Computer Architecture
l VHDL / Verilog
Verification Methodologies
l Drivers, Checkers, Monitors
l Test Generation and Coverage
l ²Unix Environment and scripting ( Perl ; Csh ; Ksh ; Tcl)
l ²Complete Design Cycle: design + verification + Synthesis
l ²Network Protocols: Ethernet, PCI, PCI-Express
l ²System On a Chip (SoC)
l ²IBM CoreConnect™ methodology
Tools
l Model-Sim (MTI) / NC-Sim / VCS
l Vera / Specman
2. Circuit Engineer
l ²The MOSFET Transistor
l ²The Wire
l ²The CMOS Inverter - Static and Dynamic Behavior
l ²Complementary CMOS
l ²Inverters Sizing ; Power Dissipation ; Logical Effort
l ²Pass transistor logic ; Dynamic Logic ; SOI CMOS
l ²Static Circuit Design
l ²Introduction to Full custom ; Introduction to VHDL
l ²Introduction to Composer + VHDL to Sch ; Verity
l ²Sizing - Rules of thumb ; Introduction to TLT + Assertions
l ²Introduction to Layout ; (FloorPlan, power mesh, pin placement, manual routing)
l ²Introduction to CCAR (for routing the top level) ;
l ²Niagra checks: DRC, LVS, METH, YIELD
l ²Erie Extraction + fix Schematic + re-sizing ; TASS
Job Responsibilities
3. Logic Design and Verification
l ²Chip definition
l ²Architecture and High Level Design
l ²Design implementation & Verification
l ²Front End Processing and PD support
l ²Chip bring up
4. Circuit Technology
CMOS
l ²9s SOI and 10s SOI technologies (0.13µ & 0.09µ)
l ²Full Custom Circuit Design
±Full Custom Macros (SCU, IU)
±Data Path Design
±RLMs
l ²Phase Lock Loop Design
l ²Arrays/SRAM Design
SiGe
l ²5AM, 7HP technologies
l ²Analog Bipolar/BiCMOS circuit design
l ²Wide band amplifiers
5. Chip Integration
(ASIC, Semi and Full custom flows)
Back end design services
l ²Synthesis & Optimization (timing, size, power)
l ²Front End Processing
l ²Timing Closure
l ²Physical Design support
Tools & Methodologies
l ²ASIC and semi custom flows
l ²3rd Party tools evaluation (Monterey, Magma)
l ²RTL Handoff
Team Requirements
l ²Require a local lead in terms or both management and technical skills
l ²Ability to take responsibility for a well defined piece of work
l ²Excellent communication skills (English)
l ²High motivation and drive to achieve
l ²Dedication and long term relationship
l ²Ability to take responsibility for a well defined piece of work
l ²Excellent communication skills (English)
l ²High motivation and drive to achieve
l ²Dedication and long term relationship
Ranking
l Experience Level Description
l 0 No Experience
l 1 Theoretical knowledge
l 2 Experienced
l 3 Expert
评论4
楼主 2006/2/24 18:37:37
免费注册供应商会员后，您点击信息发布，就有一个后台，发布招聘信息之后将在首页的招聘栏目显示。
效果更好。
楼主 2006/2/24 18:39:30
免费注册供应商会员后，您点击信息发布，就有一个后台，发布招聘信息之后将在首页的招聘栏目显示。
效果更好。
楼主 2006/2/24 18:41:25
免费注册供应商会员后，您点击信息发布，就有一个后台，发布招聘信息之后将在首页的招聘栏目显示。
效果更好。
楼主 2006/2/24 18:41:28
免费注册供应商会员后，您点击信息发布，就有一个后台，发布招聘信息之后将在首页的招聘栏目显示。
效果更好。
