请教高人：LPC2478中供以太网使用的SRAM共有16KB

但是，看了一下LPC2478的例程，

emac.h文件中：

#define EMAC_RAM_ADDR  0x7FE00000
#define EMAC_RAM_SIZE  0x00004000    /*有16KB的SRAM供使用*/

/* The Ethernet RAM is configured as below, the starting of EMAC_DESCRIPTOR_ADDR depends
on the EMAC_DESCRIPTOR_COUNT or the TOTAL_DESCRIPTOR_SIZE, at this point, the
EMAC_DESCRIPTOR_COUNT for both TX and RX is set to 16:

   EMAC_RAM_ADDR 0x7FE00000
   EMAC_DMA_ADDR 0x7FE00000
   .
   .
   .
   EMAC_DMA_END  EMAC_RAM_ADDR + EMAC_RAM_SIZE - TOTAL_DESCRIPTOR_SIZE
   TX_DESCRIPTOR_ADDR = EMAC_DESCRIPTOR_ADDR = EMAC_RAM_END(EMAC_RAM_ADDR+EMAC_RAM_SIZE) - TOTAL_DESCRIPTOR
   TX_STATUS_ADDR = TX_DESCRIPTOR_ADDR + TX_DESCRIPTOR_SIZE
   RX_DESCRIPTOR_ADDR = TX_DESCRIPTOR_ADDR + TX_DESCRIPTOR_SIZE + TX_STATUS_SIZE
   RX_STATUS_ADDR = RX_DESCRIPTOR_ADDR + RX_STATUS_SIZE
   ( RX_STATUS_ADDR + RX_STATUS_SIZE = EMAC_RAM_END )!!!!!
   EMAX_RAM_END 0x7FE04000

   Please note that, the descriptors have to be aligned to the 32 bit boundary!!!
   Below descriptor addresses have been carefully aligned to the 32-bit boundary.
   If not, the descriptors have to be re-aligned!!!
 */

#define EMAC_TX_DESCRIPTOR_COUNT 0x0010      /*描述符的个数*/
#define EMAC_RX_DESCRIPTOR_COUNT 0x0010
#define TX_DESCRIPTOR_SIZE (EMAC_TX_DESCRIPTOR_COUNT * 8)  /*描述符所占空间大小*/
#define RX_DESCRIPTOR_SIZE (EMAC_RX_DESCRIPTOR_COUNT * 8)
#define TX_STATUS_SIZE  (EMAC_TX_DESCRIPTOR_COUNT * 4)  /*状态字所占空间大小*/
#define RX_STATUS_SIZE  (EMAC_RX_DESCRIPTOR_COUNT * 8)
#define TOTAL_DESCRIPTOR_SIZE (TX_DESCRIPTOR_SIZE + RX_DESCRIPTOR_SIZE + TX_STATUS_SIZE + RX_STATUS_SIZE)
#define EMAC_DESCRIPTOR_ADDR (EMAC_RAM_ADDR + EMAC_RAM_SIZE - TOTAL_DESCRIPTOR_SIZE)

#define TX_DESCRIPTOR_ADDR EMAC_DESCRIPTOR_ADDR    /*发送描述符的基地址*/
#define TX_STATUS_ADDR  (EMAC_DESCRIPTOR_ADDR + TX_DESCRIPTOR_SIZE)  /*发送状态字的基地址紧随发送描述符*/
#define RX_DESCRIPTOR_ADDR (TX_STATUS_ADDR + TX_STATUS_SIZE)  /*接收描述符的基地址：紧随*/
#define RX_STATUS_ADDR  (RX_DESCRIPTOR_ADDR + RX_DESCRIPTOR_SIZE)

#define EMAC_DMA_ADDR  EMAC_RAM_ADDR
#define EMAC_DMA_SIZE  EMAC_RAM_ADDR + EMAC_RAM_END - TOTAL_DESCRIPTOR_SIZE

/* For EMAC TX and RX buffer, the fixed block size is EMAC_BLOCK_SIZE, there will
EMAC_TX_BLOCK_NUM and EMAC_RX_BLOCK_NUM blocks for TX and RX, the total RAM size used
is EMAC_BLOCK * (EMAC_TX_BLOCK_NUM + EMAC_RX_BLOCK_NUM) = 15360, the TOTAL_DESCRIPTOR_SIZE
is 448, the total RAM, 16384 BYTEs, is just big enough for buffers and descriptors,
EMA_BUFFER_SIZE + TOTAL_DESCRIPTOR_SIZE = 16256.

Please note,
(1) if the EMAC_DESCRIPTOR_COUNT increases, the EMAC_BUFFER_SIZE needs to be decreased
accordingly!!!!
(2) if the TOTAL_EMAC_BLOCK_SIZE increases, the EMAC_BLOCK_NUM needs to be decreased
accordingly as well!!! */

#define EMAC_BLOCK_SIZE   0x600     /*0x600==1536*/
#define EMAC_TX_BLOCK_NUM  5 
#define EMAC_RX_BLOCK_NUM  5
#define TOTAL_EMAC_BLOCK_NUM 10

#define EMAC_BUFFER_SIZE (EMAC_BLOCK_SIZE * (EMAC_TX_BLOCK_NUM + EMAC_RX_BLOCK_NUM ))
#define EMAC_TX_BUFFER_ADDR EMAC_RAM_ADDR
#define EMAC_RX_BUFFER_ADDR (EMAC_RAM_ADDR + EMAC_BLOCK_SIZE * EMAC_TX_BLOCK_NUM)

emac.c文件中有初始化：

void EMACTxDescriptorInit( void )
{
  uint32 i;
  uint32 *tx_desc_addr, *tx_status_addr;
  
  /*-----------------------------------------------------------------------------     
   * setup the Tx status,descriptor registers --
   * Note, the actual tx packet data is loaded into the ahb2_sram16k memory as part
   * of the simulation
   *----------------------------------------------------------------------------*/
  MAC_TXDESCRIPTOR = TX_DESCRIPTOR_ADDR; /* Base addr of tx descriptor array */
  MAC_TXSTATUS = TX_STATUS_ADDR;  /* Base addr of tx status */
  MAC_TXDESCRIPTORNUM = EMAC_TX_DESCRIPTOR_COUNT - 1; /* number of tx descriptors, 16 */

  for ( i = 0; i < EMAC_TX_DESCRIPTOR_COUNT; i++ )
  {
 tx_desc_addr = (uint32 *)(TX_DESCRIPTOR_ADDR + i * 8); /* two WORDs at a time, packet and control */
 *tx_desc_addr = (uint32)(EMAC_TX_BUFFER_ADDR + i * EMAC_BLOCK_SIZE); /*设置描述符的packet域*/
 *(tx_desc_addr+1) = (uint32)(EMAC_TX_DESC_INT | (EMAC_BLOCK_SIZE - 1)); /*设置描述符的control域：每个数据缓冲区分配1536个字节*/
  }
   
  for ( i = 0; i < EMAC_TX_DESCRIPTOR_COUNT; i++ )
  {
 tx_status_addr = (uint32 *)(TX_STATUS_ADDR + i * 4); /* TX status, one WORD only, status info. */
 *tx_status_addr = (uint32)0;  /* initially, set status info to 0 */
  }
  MAC_TXPRODUCEINDEX = 0x0; /* TX descriptors point to zero */
  return;
}

/*****************************************************************************
** Function name:  EMACRxDesciptorInit
**
** Descriptions:  initialize EMAC RX descriptor table
**
** parameters:   None
** Returned value:  None
**
*****************************************************************************/
void EMACRxDescriptorInit( void )
{
  uint32 i;
  uint32 *rx_desc_addr, *rx_status_addr;
  
  /*-----------------------------------------------------------------------------     
   * setup the Rx status,descriptor registers --
   * Note, the actual rx packet data is loaded into the ahb2_sram16k memory as part
   * of the simulation
   *----------------------------------------------------------------------------*/
  MAC_RXDESCRIPTOR = RX_DESCRIPTOR_ADDR; /* Base addr of rx descriptor array */
  MAC_RXSTATUS = RX_STATUS_ADDR;   /* Base addr of rx status */
  MAC_RXDESCRIPTORNUM = EMAC_RX_DESCRIPTOR_COUNT - 1; /* number of rx descriptors, 16 */

  for ( i = 0; i < EMAC_RX_DESCRIPTOR_COUNT; i++ )
  {
 /* two WORDs at a time, packet and control */
 rx_desc_addr = (uint32 *)(RX_DESCRIPTOR_ADDR + i * 8);  
 *rx_desc_addr = (uint32)(EMAC_RX_BUFFER_ADDR + i * EMAC_BLOCK_SIZE); /*设置描述符的packet域*/
 *(rx_desc_addr+1) = (uint32)(EMAC_RX_DESC_INT | (EMAC_BLOCK_SIZE - 1)); /* set size only */   
  }
 
  for ( i = 0; i < EMAC_RX_DESCRIPTOR_COUNT; i++ )
  {
 /* RX status, two uint16s, status info. and status hash CRC. */
 rx_status_addr = (uint32 *)(RX_STATUS_ADDR + i * 8); 
 *rx_status_addr = (uint32)0; /* initially, set both status info and hash CRC to 0 */
 *(rx_status_addr+1) = (uint32)0;
  }
  MAC_RXCONSUMEINDEX = 0x0; /* RX descriptor points to zero */
  return;
}

照这样算下来，16KB根本不够用啊~~